Substrate coupling in integrated circuits is the process whereby, parasitic current flow in the substrate, electrically couples devices in different parts of the circuit. Higher levels of integration and higher frequencies of operation
makes the coupling more pronounced in modern circuit realizations. Electrical coupling in the substrate leads to undesirable interaction between devices which can degrade circuit performance. The degradation can manifest itself in different ways. In mixed analog-digital circuits, for example, the switching-noise
generated by digital circuits can be coupled to sensitive analog circuits through the substrate.
Performance degradation due to substrate coupling can be addressed at the circuit design stage by including substrate models in circuit analysis. Analytical models based on simple substrate resistance plots are developed. Trends in substrate resistance variation for diŽerent substrates are studied to understand its effect at the circuit level. Analytical model for measurement of substrate coupling at the circuit level based on substrate resistance information and other circuit parameters is developed. Efficient techniques to improve isolation based
on simulation and analysis of the substrate model are discussed.
