| Type of Document |
Master's Thesis |
| Author |
Uppathil, Satish Vijayan, |
| URN |
etd-07222002-001939 |
| Title |
Layout Oriented Design Practice for
Capturing Distributed Effects in High-Speed Circuits. |
| Degree |
Master of Science |
| Graduate Program |
Electrical Engineering |
| Advisory Committee |
| Advisor Name |
Title |
| Michael Steer |
Committee Chair |
| Gianluca Lazzi |
Committee Member |
| Griff Bilbro |
Committee Member |
|
| Keywords |
- power-combining systems.
- grid amplifier
- parasitics
- Layout
|
| Date of Defense |
2002-07-09 |
| Availability |
unrestricted |
Abstract
UPPATHIL, SATISH VIJAYAN. Layout Oriented Design Practice for Capturing Distributed Effects in High-Speed Circuits. (Under the direction of Michael B. Steer.)
An integrated environment for layout-oriented design of circuits for spatial power combining system is aimed in this study. The simulation environment would include a full-wave electromagnetic simulator and a circuit simulator, TRANSIM, with a front engine, which is the major emphasis in this document. Also, the controlled and independent sources based on the Hspice models are implemented in the state-variable based object-oriented circuit simulator, TRANSIM. Transim implements local reference node instead of a global ground and this is crucial for distributed circuits. The models are implemented in object-oriented fashion and uses automatic differentiation. The same model can be used for DC, transient and harmonic balance analysis.
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| Files |
| Filename |
Size |
Approximate Download Time
(Hours:Minutes:Seconds)
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| 28.8 Modem |
56K Modem |
ISDN (64 Kb) |
ISDN (128 Kb) |
Higher-speed Access |
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etd.pdf |
691.44 Kb |
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