2018 conference paper

Performance optimization of A 1.2kV SiC high density half bridge power module in 3D package

Thirty-third annual ieee applied power electronics conference and exposition (apec 2018), 1266–1271.

co-author countries: United States of America 🇺🇸
Source: NC State University Libraries
Added: August 6, 2018

Wide bandgap power semiconductor devices show significantly superior performance than Si power devices, power module solutions are being investigated trying to improve system-level performance by applying SiC and GaN power devices in various applications. This paper introduces the design of a 1.2kV high density SiC half bridge intelligent power module based on 3-dimensional package concept, also addressed is the performance optimization of the proposed power module design. In the designed module, SiC MOSFETs and corresponding gate driver circuits in half bridge are interconnected vertically with high interconnection density and low power loop profile. Ultra-low parasitic inductance, 1.3nH, is introduced from DC+ to DC-. Isolation function blocks and bootstrap power supplies are also integrated in the 3D package. An ultra-thin dielectric substrate, with good thermal and breakdown performance, is applied to further decrease the power module weight and volume. The entire 3-dimensional 1.2kV SiC power module are within 35mm × 15mm × 7mm space. Through optimization, the design can achieve 8ns turn-on transient with limited switching loss at up to 700V / 60A. Thermal performance of the designed module is also evaluated through simulations.